Project - hardware to run AOS4 for 35 euro on QEMU 10 + GPU  passthrough

@balaton
I have noticed one more thing regarding QEMU 8x and QEMU 10.
QEMU 8 is able to show me an image on the output of the ‘ati’ device with rom image and pegasos2.rom
Screen - > https://ibb.co/vCdzsmL2
QEMU 10 does not display anything.
Screen - > https://ibb.co/B5pzTMCL
This may have nothing to do with "vfio", but I thought this information might be useful for something.
The writing ‘Amiga’ in ASCII in QEMU 10 has nothing to do with it.

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Ok I will look for these messages and read what I have missed. Sorry for duplicating the topic.
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As for that code from the message that contained the Hans code from the qemu-ppc list I have it somewhere on disk. I will look for it but not until next week as I will not have access to a computer due to a trip.
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I only asked because I noticed that something works differently, but as you write maybe it was a bug. I still have to check it thoroughly in tests when using AOS4.

@smarkusg
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I have bisected this to this commit which enables configuring location of the VIA south bridge devices. The pegasos2.rom seems to put parallel port to 0x3BC which was ignored before this commit and parallel port was at default 0x378 location that this VBIOS seems to depend on so maybe this is also broken on real Pegasos II. But what does a VBIOS has to do with a parallel port and why is it broken by not finding one? Maybe the port number of parallel port is configurable on real Pegasos II but that may need NVRAM which we don't have. As the pegasos2.rom writes this config I can't fix it in QEMU as the default is overwritten by the firmware.

@smarkusg
Quote:The Copy from/to VRAM functions are internal functions of the GFXBench2D tool, the ones Hans published in some forum post here and balaton on the qemu mailing list.
IIRC it only includes 2 versions: General PowerPC code* and a G4 AltiVec version.

The Read/Write Pixel Array functions are AmigaOS functions in graphics.library for reading/writing data from/to VRAM (and other cases, like bitmaps swapped out from VRAM to DRAM if the gfx card VRAM is completely used, but that should only be an usual case on very old Zorro and PCI gfx cards and maybe the SM501/2 with only 2-256 MB VRAM, not on Radeon HD/RX gfx cards with several GB of VRAM), and include a lot more different versions, for example some of them may use the DMA engines of the SoC CPUs.
For QEmu there should only be 3 relevant ones, the G2/G3 (general PowerPC code*), the G4 AltiVec and the 4x0 DMA versions.

*) Limited to, or only fast on, 32 byte cache line CPUs with a FPU, i.e. not usable, or at least too slow, on the A1222 (no FPU), X1000 and X5000 (64 bit POWER and PowerPC CPUs use a 64 byte cache line size by default, which requires using different DCB(A|Z|T|TST)(|.L) optimizations).