@balaton
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Did you check ME bit in MSR so MCE is not disabled? (Without a CPU manual it may be hard to know which bit is that exactly but maybe it's documented somewhere in the ISA version PA6T follows.)
You mean when OS4 loaded up ?
On
https://en.wikipedia.org/wiki/PWRficient says "Power ISA v.2.04" so same as others, and that mean bit 12 of MSR are ME bit. Then when OS running , i by mfmsr found that MSR = 0xB030. 0xB030 in binary = 1011 0000 0011 0000 - bit 12 is set, mean MCE enabled.
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I don't understand these acronyms. What do you mean?
Again some of this are new for me too, and i can say some bull, but i understand this that way : there are old (CAM) and new (ECAM) strandards of PCI/PCIe meaning "Configuration Access Mechanism" for CAM and Extendend Configuration Access Mechanism for ECAM.
What it mean is that it's CPU chip dictate in hardware by PCI/PCIe protocol (CAM/ECAM) where placed configuration space registers. Now, when computer (be it x1000, or PC or any) boots, it's already known which address is a start of the PCI devices (from datasheets on CPUs probably, and in our case i take it from linux kernel code port to X1000, as we have no datasheet). So in our case with X1000 its 0xE0000000, so all PCI starts here physically. The way how they placed in are old (CAM) and new (ECAM).
Now, some devices have BAR, some have not (host bridges, pci-to-pcie bridge, integrated devices like our IOC, MAC, DMA, etc, where not need lots of memory like for graphics card,etc). After computer boots, firmware start to check PCI devices, and discover : if there NOBAR devices, simple skip it. This will be accessed directly. if there is BAR devices it then write an address of device to BAR, and then, when OS boots, it then do MMU mapping of this address, while NOBAR ones still untouched as it, just MMU mapped whole region of 0xE0000000 so we can access them from OS, but individual devices which have no BARs are not MMU mapped.
Now, when i say "those are ECAMS", i mean that those addresses of IOB/DMA/MAC do not go the individual MMU-mapping route by OS, and then GetResourceRange() return NULL for them as search for BARs. You can only access them directly by ECAM standard. Which (both and old CAM and ECAM) have a formulas to calculate an address of device. In our case its ECAMs one :
0xE0000000 | (dev<<15) | (fn<<12) | offset
I can't be 100% sure without datasheet on PA6T CPU that it exactly that statdard, but i can with 100% sure say that the caclulation formula of ECAM standard fits very well on PA6T, and indeed found IOB/DMA and MAC where they are on X1000, so, this probably ECAM standard used indeed (and what else it can be: all in all its same PC, just with PPC cpu and CFE).
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Ask dma.resource author if you have contact what channels that can use and what are reserved for network if any. It may not be the same as on Linux and using a channel without reserving it in dma.resource might lead to clashes with other things using DMA. Is it possible to disable DMA usage in AmigaOS so you can be sure only your driver accesses it? Or get a channel from dma.resource and use that.
X1000 do have pasemi_dma.resource, but i not use it. I do everything from scratch , so to avoid possible issues other ones step in when trying to create onboard driver. Still it's in the system, and probably used by something else, but i can try to simple comment it out to not boot, to see how OS will works without and if it will , and lockup will still be there, it mean this resource not to blame.
But to be honest i not very well understand why pasemi_dma.resource should allocate anything about network, if it's work of network device, which can (or can not) use this pasemi_dma.resource ?