X1000 CFE Patches: Testers Welcome (Fear not: real-time, no reflashing) v.01

@sailor

I notice you are getting DRQ errors. I've only seen this when reading from optical disk with atapi device. Though it can affect any data transfer I've only noticed it when I had optical discs in my drive while booting CFE.

@nbache
yes, the commads was enclosed within quotes

@pvanni
@nbache

Quote:

There is a glitch when saving envars with the patch. kas1e already knows.
Save the envars without patch applied.

see post #33

@kas1e
@sailor

I was away a couple of days. I'll do the tests too and add them to the ones sailor already did.

@kas1e
Quote:
In case that helps I have this:
https://zero.eik.bme.hu/~balaton/qemu/qemu-X1000-test.patch.xz

To try it you need this command:
qemu-system-ppc64 -machine x1000 -serial stdio -bios cfe.bin -d unimp,guest_errors,invalid_mem,in_asm -trace enable="serial*"
But you would need to add a lot of PA6T emulation to make this boot anything or be able to test more than the CFE startup but maybe it's good as a start or for some simple testing/debugging but I think it won't get far enough without i2c and pci parts to even get a prompt in CFE.

I think with this patch CFE tries to detect the RAM but I don't see where it tries to access the i2c bus. I think it fails around 0xffe08c64 (easy to remember address due to ending in c64 ) where it attempts to access SMBus but gets something unexpected and never gets to poke the i2c registers. Maybe it could be found out with an attached debugger what it looks for but I haven't tried that.

In this patch I've also added a PA6T object where all the internal devices of the CPU/SoC could be implemented. The X1000 does not have a north bridge as it is embedded in the CPU. This is where it gets complex as the PA6T seems to have an internal PCIe bus where all the internal devices appear so this should be modelled accordingly in QEMU: create a PCI bus, implement PCIDevice subclasses for the internal devices and find out how to access their config registers in a memory mapped region (AFAIK this is a feature of PCIe so this should be implemented in QEMU already but I don't know how so need to look at how other machines with PCIe do it in QEMU to find out). For now I tried to just emulate the few registers it accesses but probably missed something. I think the SMBus device should have a BAR that contains the i2c registers but
I don't see it accessing it but stops when trying to read the vendor/device ids.

Due to the lot of missing devices to emulate in PA6T plus the south bridge (that is not too difficult but also some code to write comparable to the VT82xx models) it probably isn't worth emulating the whole machine but for CFE testing only the parts CFE accesses might be enough but could still be too complex. it's doable but the result would not be better than the already emulated machines so maybe it's only interesting for such testing as firmware development/debugging.