@kas1e
I don't know but I don't think any OF implementation is still developed since Sun and Apple stopped using it so the one from 20 years ago may still be the latest. If you try to get that ported I'd suggest to first try to reconstruct the pegasos2 ROM so you know better what to do than trying to port it right away to a different platform but maybe it's easier to port in a different way, I don't know.
The pegasos2 rom seems to have two parts: a compressed image at around 0x20000 that is called oftest_64M.rom which I think is actual SmartFirmware that you could build from the open sources maybe with some patches and a loader called PegasosII Boot Strap that first starts, inits the machine and memory and then uncompresses and starts SmartFirmware. This is the bPlan code that isn't open sourced. This also includes a low level monitor called IKARUS low level console that is entered when no memory is found. You can force that on QEMU with removing the SPD EEPROM by commenting these lines (and the variable definitions) in qemu/hw/ppc/pegasos.c::pegasos_init()
- I2CBus *i2c_bus;
- uint8_t *spd_data;
- i2c_bus = I2C_BUS(qdev_get_child_bus(DEVICE(dev), "i2c"));
- spd_data = spd_data_generate(DDR, machine->ram_size);
- smbus_eeprom_init_one(i2c_bus, 0x57, spd_data);
then you get
$ qemu-system-ppc -M pegasos2 -serial mon:stdio -bios pegasos2.rom
PegasosII Boot Strap (c) 2002-2003 bplan GmbH
Running on CPU PVR:80020102
Enable L1 ICache... Done.
Clean/Flush Block enabled
Reading W83194 : FAILED.
Setting Front Side Bus to 133MHz... FAILED.
Configuring DDR... Done.
Configuring PCI0... Done.
Configuring PCI1... Done.
Configuring ETH... Done.
Releasing IDE reset ... Done.
Configuring Legacy Devices
Initializing KBD... Done.
Testing 00000000 Bytes, Pass: 00000000 Failed: 00000000
RAM TEST (fill linear)... Done.
FFFFFFFF
Entering IKARUS low level console
>
This has a helpful help command: pressing ? prints #RTFM but there's some info on this
here. The output above shows what this code is doing and you can probably trace on QEMU what registers these access so to reconstruct it you'd need to reverse and reimplement it then combine with the SmartFirmware. If SmartFirmware has a compressed loader then this may be based on that with the above hardware init added. if that loader is not in SmartFirmware it may be similar to what PMON does. The most complex part is probably getting SPD data over i2c and init the memory controller based on that.
I've asked bPlan before if they could open source their part but I never got any answer from them. Genesi open sourced what they had including the full schematics that I've linked from
my page about Pegasos2 emulation.