@Rogue
Quote:
Beg your pardon, but that is not true. There is nothing wrong with either DMA nor memory allocation under AmigaOS 4.0. There is a bug in CachePreDMA that will prevent it from working correctly when the DMA transfer is over 4k, which should be fixed in the meantime and will be part of the update to be released later this month.
Of course, the memory under OS 4 need not be continous, so scatter/gather DMA support is required from a device, but that is not a bug but rather a feature.
I'm doing hardware, so I must beg your pardon for my simplified view of the world. In hardware, you always are limited in number of registers, and number of logic resources, and maybe even the design of the DMA engine inside the I/O chip you have.
Nowadays, and in case of the Deneb, this doesn't matter, as the bus controller FPGA is only filled to a certain percentage, and I have loads of resources free for upgrades and workarounds, but for all existing hardware on Zorro III doing DMA these limitations mentioned above do exist.
If you take a device driver of OS3.x doing DMA, or any application which does reserve DMA buffers under OS3.x, then it will use the AllocVec() function or its equivalent.
This does deliver a physically continous segment of memory which can be used for DMA.
Under OS4 this behaviour has been changed, whether this is intended or not.
But: taken the case that the most popular DMA devices on Amiga Classic won't receive any updates to provide them with a scatter/gather DMA engine (in most cases this can't be done, as resources in the chips are too small), then the small change in memory allocation did KILL all those devices for OS4. Simple as that.
This includes the A4000T onboard SCSI, the Fastlane SCSI and the A4091 (latter one broken by design in DMA anyhow).
Of course you may still workaround this situation (which was a feature?) by limiting DMA transfers to 4KB, AFAIK this is the smallest memory segment under OS4. But then you drop performance, as each 4KB block will need its own DMA engine setup, CachePreDMA(), interrupt, CachePostDMA() and all administration stuff correlated to DMA.
And yes, I consider this particular detail in OS4 as broken.
Michael