Not too shy to talk
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Dont spend to much time on the Memory message... its not an issue. The X5000 mentioned here has always been running in this setup.
Here i have the output of a Friends X5000 who has the same message. His system is doing fine!
Board: CYRUS 36-bit Addressing I2C: ready SPI: ready DRAM: Initializing....using SPD Detected UDIMM 99U5584-020.A00LF Detected UDIMM 99U5584-020.A00LF Not enough bank(chip-select) for CS0+CS1 on controller 0, interleaving disabled! Not enough bank(chip-select) for CS0+CS1 on controller 1, interleaving disabled! 6 GiB left unmapped 8 GiB (DDR3, 64-bit, CL=11, ECC off) DDR Controller Interleaving Mode: cache line
And this is My X5000 output..without the memory message...also doing fine!
Board: CYRUS 36-bit Addressing I2C: ready SPI: ready DRAM: Initializing....using SPD Detected UDIMM KHX1600C10D3/8G Detected UDIMM KHX1600C10D3/8G 14 GiB left unmapped 16 GiB (DDR3, 64-bit, CL=9, ECC off) DDR Controller Interleaving Mode: cache line DDR Chip-Select Interleaving Mode: CS0+CS1
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