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sailor

Re: FTP Between OS3 and OS4

Posted on: 5/29 9:20 #1

Not too shy to talk

@nbache
I second this - for sharing file between AmigaOS 3, AmigaOS 4 and MorphOS is best NetFS. Newest version works fine.

@MartinW
some FTP servers also sensitive for correct settings of path and other details - can you share here some error logs?

AmigaOS3: Amiga 1200
AmigaOS4: Micro A1-C, AmigaOne XE, Pegasos II, Sam440ep, Sam440ep-flex, AmigaOne X1000
MorphOS: Efika 5200b, Pegasos I, Pegasos II, Powerbook, Mac Mini, iMac, Powermac Quad

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sailor

Re: Quake II Benchmark...

Posted on: 5/28 11:39 #2

Not too shy to talk

@Cageman
super!

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sailor

Re: Checkmate A1500 Mini A1222 build

Posted on: 5/28 8:00 #3

Not too shy to talk

@dfstudios
Nice Amiga!

In past I wanted Checkmate cases for some of my NG Amigas. Unfortunatelly, I found the same problem like you - missing front USB ports. Your solution is very nice.

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sailor

Re: SoDIMM DDR3 testing on A1222

Posted on: 5/20 9:49 #4

Not too shy to talk

@joergQuote:

joerg wrote:On the 4x0 CPUs it's IIRC 41 bit, 2 TB = 2048 GB RAM, but I doubt the Sam440/460 supports more than 4 GB.

Sam440 CPU ( AMCC 440ep ) has limit 1 GB of RAM ( 4x 256 MB banks ), so it cannot have more on physical hardware.
Sam460 CPU ( AMCC 460ex ) has limit 8 GB of RAM ( 4x 2 GB banks ). So theoretically if exists SO-DIMM RAM 8GB with 4 ranks, it "should works". In real, I found only 4 GB SO-DIMM modules with 4 ranks. In future I will test it in Sam and let know.

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sailor

Re: SoDIMM DDR3 testing on A1222

Posted on: 5/18 15:22 #5

Not too shy to talk

Quote:

dooz wrote:I tested several kinds of DDR3 in A1222.
I tested two kind of 1333 MHz and one 1066 MHz. All worked ok.

I *didnt tested* 1600 MHz because the ones I have are *DDR3L* declared as 1.35V. DDR3 is usually 1.5V. Both are pin compatible but I simply didnt want to test that to avoid possible problems or to damaged board. Cant find any info that A1222 is compatible with DDR3L - maybe someone else can confirm?

Also other test results and compatibility reports from other A1222s out there are also usefull. DDR3 SoDIMM can be found in old PC laptops.

-dooz

Thanks for testing. You can use DDR3L memory on DDR3 slot. But DDR3 memory in DDR3L motherboard not works. DDR3L memory stick are dual voltage. Dell article.

I tested Kingston 8GB DDRL KF318LS11IB/8 and it works fine, results are similar like your 4GB module:


Function    Best Rate MB/s  Avg time     Min time     Max time 

Copy:             787.1     0.204503     0.203269     0.208423 

Scale:            492.9     0.326322     0.324588     0.329637 

Add:              568.0     0.424966     0.422508     0.427871 

Triad:            541.6     0.445014     0.443115     0.449225

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sailor

Re: sam460: new uboot update to handle RadeonRX coming soon!

Posted on: 5/13 7:42 #6

Not too shy to talk

Nice news!
thanks to ACube!

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sailor

Re: Trying to get a Radeon HD 7750 working in an AmigaOne XE

Posted on: 5/5 10:03 #7

Not too shy to talk

@Hypex
@Gebrochen

Today has no big sense to try PCIe HD card on AmigaOne XE.
It works, but problem is that new RadeonHD drivers mostly not works with XE.

Like joerg mentioned, you have to use 33 MHz slot, DMA-unfixed machine, and also PCI interrupts are not initialized.

The last can be corrected XE - hw interrupts, but speed is still low.

My summary is, that Sam440ep-flex is much better with RadeonHD card, XE with HD card is worse.

But I am not tred Nova Bridge on XE, maybe compatibilty is higher than Warp3D-SI.

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sailor

Re: A1222 support in the SDK and problems

Posted on: 5/5 9:55 #8

Not too shy to talk

@doozQuote:

dooz wrote:@sailor

A little bit higher results here on A1222. I am running a beta 1222 Tabor system from year 2016. I repeated test with emergency USB stick that is delivered with A1222+ but the results are the same. Maybe you have some stuff working in background.....

Indeed LTE emulator is doing a great job. In applications with less FPU code user will not notice any speed slowdown. That is the main objective with LTE. But I guess these results are also high because of fast memory transfer on A1222.

Yes, it depends a lot on memory speed, this benchmark is for measuring of "Sustainable Memory Bandwidth" - i.e. memory + some non-heavy FPU operatons with it.

Quote:

I tested all this in A1222 and results are great in some games, some not (too slow to play). I even amanged to get Quake Darkplaces working with more than 20 fps under LTE (Quake uses a lot FPU code). Quake darkplaces must be started with benchmark switch (otherwise it doesnt work, also game must be started from previous saved game position - if you have one from other Amiga system):

stack 9000000
darkplaces-sdl -benchmark -widht 640 -height 480

Lots of things to investigate and play around with A1222 Real SPE optimized games will work excellent because SPE FPU performance is fast. This is when FPU is used in games - then I guess the real thing is to transfer all the calculations on the graphic card...not using much of FPU.

Here I have A1222 with Radeon RX 580. It works great.

It is great, that you find the way how run Darkplaces. Thank you, I will use it for benchmarking too. I have no success with classic MiniGL Quake - LTE crashes, and compatible emulator is not useful ( cca 2 FPS

)

Maybe it will be wise to have some webpage with howto for running non-spe games on A1222? Maybe ask Eliyahu to add your info on his page?

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sailor

Re: A1222 support in the SDK and problems

Posted on: 5/2 16:20 #9

Not too shy to talk

@all
I have another question, about alignment:
this code is compilled with -mspe -mcpu=8540 -mfloat-gprs=double -mabi=spe ( i.e. for SPE)


double X __attribute__ ((aligned (64)));

...

main(){

X=0.499975;

When compilled without optimalization, allways generated guru "error of alignment type"
When I compilled it with -O1, it runs normally.

I tried with and without __attribite__, static, also X=(double)0.499975; ... allways with the same result.

Which from optimize parameters should cause the alignment?
Or are there another way howto allign it?

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sailor

Re: Ragemem source code

Posted on: 4/30 5:56 #10

Not too shy to talk

@K-L
thank you.
It is a pitty, so I have to wrote some benchmark ourselves

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sailor

Re: A1222 support in the SDK and problems

Posted on: 4/28 13:32 #11

Not too shy to talk

A1222+ results:

native SPE FPU:


8.System:> Work:Benchmark/stream-5.10-AOS/ 

8.Work:Benchmark/stream-5.10-AOS> stream_spe 

-------------------------------------------------------------

STREAM version $Revision: 5.10 $

-------------------------------------------------------------

This system uses 8 bytes per array element.

-------------------------------------------------------------

Array size = 10000000 (elements), Offset = 0 (elements)

Memory per array = 76.3 MiB (= 0.1 GiB).

Total memory required = 228.9 MiB (= 0.2 GiB).

Each kernel will be executed 10 times.

 The *best* time for each kernel (excluding the first iteration)

 will be used to compute the reported bandwidth.

-------------------------------------------------------------

Your clock granularity/precision appears to be 2 microseconds.

Each test below will take on the order of 293711 microseconds.

   (= 146855 clock ticks)

Increase the size of the arrays if this shows that

you are not getting at least 20 clock ticks per test.

-------------------------------------------------------------

WARNING -- The above is only a rough guideline.

For best results, please be sure you know the

precision of your system timer.

-------------------------------------------------------------

Function    Best Rate MB/s  Avg time     Min time     Max time

Copy:             787.1     0.204503     0.203269     0.208423

Scale:            492.9     0.326322     0.324588     0.329637

Add:              568.0     0.424966     0.422508     0.427871

Triad:            541.6     0.445014     0.443115     0.449225

-------------------------------------------------------------

Solution Validates: avg error less than 1.000000e-13 on all three arrays

standart powerpc FPU code with LTE emulator:


8.Work:Benchmark/stream-5.10-AOS> stream

-------------------------------------------------------------

STREAM version $Revision: 5.10 $

-------------------------------------------------------------

This system uses 8 bytes per array element.

-------------------------------------------------------------

Array size = 10000000 (elements), Offset = 0 (elements)

Memory per array = 76.3 MiB (= 0.1 GiB).

Total memory required = 228.9 MiB (= 0.2 GiB).

Each kernel will be executed 10 times.

 The *best* time for each kernel (excluding the first iteration)

 will be used to compute the reported bandwidth.

-------------------------------------------------------------

Your clock granularity/precision appears to be 2 microseconds.

Each test below will take on the order of 1032608 microseconds.

   (= 516304 clock ticks)

Increase the size of the arrays if this shows that

you are not getting at least 20 clock ticks per test.

-------------------------------------------------------------

WARNING -- The above is only a rough guideline.

For best results, please be sure you know the

precision of your system timer.

-------------------------------------------------------------

Function    Best Rate MB/s  Avg time     Min time     Max time

Copy:             788.5     0.204721     0.202919     0.208100

Scale:            148.0     1.081844     1.080804     1.085773

Add:              154.7     1.554502     1.551267     1.557342

Triad:            148.2     1.622773     1.619742     1.626540

-------------------------------------------------------------

Solution Validates: avg error less than 1.000000e-13 on all three arrays

LTE FPU emulation is very fast - more than 25% of SPE FPU native code.
Unfortunatelly majority of 3D games nor works with LTE and interpretative emulator must be used, and it is very slow.

Topic | Forum

sailor

Re: A1222 support in the SDK and problems

Posted on: 4/28 8:31 #12

Not too shy to talk

My first SPE-modified application stream is finished!

I need some apps for bechmarking of A1222+, and if nearly no exists, I have to it myselves

.
It is on OS4 depot now. It is only one small easy piece, but this is also my first c-code after 20+ years, so I am happy...

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sailor

Re: Pegasos2 with RadeonHD/RX via bridge

Posted on: 4/27 20:01 #13

Not too shy to talk

@kas1eQuote:

kas1e wrote:@All

Is it correct datasheet for pegasos2's MartvelDiscovery2 MV64351 northbridge ?:

https://www.freecalypso.org/pub/PowerP ... eets/DS_64360_1_2.pdf.zip

Sounds like this, just need to be sure.

Yes! Pegasos 2 has MV64361 version:
Resized Image

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sailor

Re: SDL2_image on A1222

Posted on: 4/27 19:49 #14

Not too shy to talk

@walkeroQuote:

walkero wrote:[quote]
SDK has multiple different versions which you can select with its installer. There is GCC 8, 10, 11 and 6 for SPE compatibility (A1222).

I am using gcc v.6 for SPE programming.
Please, are there any reason to use v.8 or v.10 for standard powerpc codes?
Had they some advantage / feature over v.11 ?

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sailor

Re: Amiga X5000 and Sound Blaster Audigy FX problem

Posted on: 4/26 11:54 #15

Not too shy to talk

@geennaam
In any case, it will be a pitty, if you will stop your work with AmigaOS.
( I don't mean to say that spending more time with your wife and children is not good

)

I was always most looking forward to the third driver from your avatar...

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sailor

Re: Pegasos2 with RadeonHD/RX via bridge

Posted on: 4/22 18:20 #16

Not too shy to talk

@kas1e
my xorg.confs are on hyperion site

So if you have in lspci: 0000:01:00.0
in xorg.conf in Device section probably should be:

BusID "PCI:1@0:0:0"
or
BusID "PCI:1:0:0"


Section "Device"

     Option     "Accel"    "yes"             # [<bool>]

     Identifier  "Radeon X1950 XT"

     Driver      "radeon"

     BusID       "PCI:1@0:0:0"

EndSection

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sailor

Re: Pegasos2 with RadeonHD/RX via bridge

Posted on: 4/22 7:42 #17

Not too shy to talk

@kas1e

I just answered on hyperion website ( look here for example).
Try to setup xorg.conf with right BusID.

When I will be at home, I will send examples of config.

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sailor

Re: A1222 support in the SDK and problems

Posted on: 4/18 15:47 #18

Not too shy to talk

@joergQuote:

- Build everything which doesn't use (much) float/double code with -msoft-float and use the soft-float C library.
- Put code which uses float/double calculations in separate sources compiled with -mabi=spe -mfloat-gprs=double instead.

And what if I need to use math library functions ( sin,cos..)? Do you know, what is faster? To call it newlib + standard powerpc way, i.e. it uses LTE emulator, or to use clib2 + integer emulation from here?
Of course, I cam measure it, I am asking just for case.

Quote:

- Make sure SPE functions called from soft-float code, and the other way round, are compatible, for example by only using pointers to float/double instead of direct float/double parameters. May not even be required if they are compatible anyway, as salass00 wrote.

at least printf, fprintf and sin() are not identical ( newlib.library 53.84 )- calling from SPE code returns nonsence. These I tested.

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sailor

Re: A1222 support in the SDK and problems

Posted on: 4/18 15:25 #19

Not too shy to talk

@joerg
@salass00

Thank you for explanation.

Topic | Forum

sailor

Re: A1222 support in the SDK and problems

Posted on: 4/18 12:10 #20

Not too shy to talk

@flash

It is not so simple

From point of view of SPE embedded FPU it is HARD float, becouse it uses SPE-natural instructions and registers ( but these are not FPRs, but 64-bit GPRs ).
From point of view of powerpc code it is SOFT float, because it uses GPR registers and has no powerpc instructions.

From the point of view of gcc SPE code is SOFT float:


gcc -mcpu=8540 -mspe -mabi=spe -mfloat-gprs=double -c Stream2_mh.c -o Stream2_mh.o

gcc -mcpu=powerpc -c spe_float_transition.c -o spe_float_transition.o

gcc Stream2_mh.o spe_float_transition.o -o Stream2_mh

ld: Warning: spe_float_transition.o uses hard float, Stream2_mh uses soft float

Stream2_mh.c is benchmark compilled with SPE, spe_float_transition.c contains functions which should be called with powerpc float parameters, like printf.
gcc recognizes SPE code like soft-float.

If I remember good, comlilling with additional -mhard-float:


gcc -mcpu=8540 -mspe -mabi=spe -mfloat-gprs=double -mhard-float -c Stream2_mh.c -o Stream2_mh.o

generates some error - but I can check it again.

And gcc 6.4.0 online docs says:
Quote:

-msoft-float
-mhard-float
Generate code that does not use (uses) the floating-point register set. Software floating-point emulation is provided if you use the -msoft-float option, and pass the option to GCC when linking.

And as if embedded spe FPU has no floating-point register set, it is recognized like soft

It is only my explanation, and of course, I can be wrong. I start to play with this only after A1222+ arrive, so there is a lot of things more to study.

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